M480 BSP V3.05.006
The Board Support Package for M480 Series
rtc_reg.h
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1/**************************************************************************/
9#ifndef __RTC_REG_H__
10#define __RTC_REG_H__
11
12#if defined ( __CC_ARM )
13#pragma anon_unions
14#endif
15
26typedef struct
27{
28
29
1654 __IO uint32_t INIT;
1655 __IO uint32_t RWEN;
1656 __IO uint32_t FREQADJ;
1657 __IO uint32_t TIME;
1658 __IO uint32_t CAL;
1659 __IO uint32_t CLKFMT;
1660 __IO uint32_t WEEKDAY;
1661 __IO uint32_t TALM;
1662 __IO uint32_t CALM;
1663 __I uint32_t LEAPYEAR;
1664 __IO uint32_t INTEN;
1665 __IO uint32_t INTSTS;
1666 __IO uint32_t TICK;
1667 __IO uint32_t TAMSK;
1668 __IO uint32_t CAMSK;
1669 __IO uint32_t SPRCTL;
1670 __IO uint32_t SPR[20];
1672 __I uint32_t RESERVE0[28];
1674 __IO uint32_t LXTCTL;
1675 __IO uint32_t GPIOCTL0;
1676 __IO uint32_t GPIOCTL1;
1678 __I uint32_t RESERVE1[1];
1680 __IO uint32_t DSTCTL;
1682 __I uint32_t RESERVE2[3];
1684 __IO uint32_t TAMPCTL;
1686 __I uint32_t RESERVE3[1];
1688 __IO uint32_t TAMPSEED;
1690 __I uint32_t RESERVE4[1];
1692 __I uint32_t TAMPTIME;
1693 __I uint32_t TAMPCAL;
1695} RTC_T;
1696
1702#define RTC_INIT_ACTIVE_Pos (0)
1703#define RTC_INIT_ACTIVE_Msk (0x1ul << RTC_INIT_ACTIVE_Pos)
1705#define RTC_INIT_INIT_Pos (1)
1706#define RTC_INIT_INIT_Msk (0x7ffffffful << RTC_INIT_INIT_Pos)
1708#define RTC_RWEN_RWENF_Pos (16)
1709#define RTC_RWEN_RWENF_Msk (0x1ul << RTC_RWEN_RWENF_Pos)
1711#define RTC_RWEN_RTCBUSY_Pos (24)
1712#define RTC_RWEN_RTCBUSY_Msk (0x1ul << RTC_RWEN_RTCBUSY_Pos)
1714#define RTC_FREQADJ_FREQADJ_Pos (0)
1715#define RTC_FREQADJ_FREQADJ_Msk (0x3ffffful << RTC_FREQADJ_FREQADJ_Pos)
1717#define RTC_FREQADJ_FRACTION_Pos (0)
1718#define RTC_FREQADJ_FRACTION_Msk (0x3ful << RTC_FREQADJ_FRACTION_Pos)
1720#define RTC_FREQADJ_INTEGER_Pos (8)
1721#define RTC_FREQADJ_INTEGER_Msk (0x1ful << RTC_FREQADJ_INTEGER_Pos)
1723#define RTC_FREQADJ_FCR_BUSY_Pos (31)
1724#define RTC_FREQADJ_FCR_BUSY_Msk (0x1ul << RTC_FREQADJ_FCR_BUSY_Pos)
1726#define RTC_TIME_SEC_Pos (0)
1727#define RTC_TIME_SEC_Msk (0xful << RTC_TIME_SEC_Pos)
1729#define RTC_TIME_TENSEC_Pos (4)
1730#define RTC_TIME_TENSEC_Msk (0x7ul << RTC_TIME_TENSEC_Pos)
1732#define RTC_TIME_MIN_Pos (8)
1733#define RTC_TIME_MIN_Msk (0xful << RTC_TIME_MIN_Pos)
1735#define RTC_TIME_TENMIN_Pos (12)
1736#define RTC_TIME_TENMIN_Msk (0x7ul << RTC_TIME_TENMIN_Pos)
1738#define RTC_TIME_HR_Pos (16)
1739#define RTC_TIME_HR_Msk (0xful << RTC_TIME_HR_Pos)
1741#define RTC_TIME_TENHR_Pos (20)
1742#define RTC_TIME_TENHR_Msk (0x3ul << RTC_TIME_TENHR_Pos)
1744#define RTC_CAL_DAY_Pos (0)
1745#define RTC_CAL_DAY_Msk (0xful << RTC_CAL_DAY_Pos)
1747#define RTC_CAL_TENDAY_Pos (4)
1748#define RTC_CAL_TENDAY_Msk (0x3ul << RTC_CAL_TENDAY_Pos)
1750#define RTC_CAL_MON_Pos (8)
1751#define RTC_CAL_MON_Msk (0xful << RTC_CAL_MON_Pos)
1753#define RTC_CAL_TENMON_Pos (12)
1754#define RTC_CAL_TENMON_Msk (0x1ul << RTC_CAL_TENMON_Pos)
1756#define RTC_CAL_YEAR_Pos (16)
1757#define RTC_CAL_YEAR_Msk (0xful << RTC_CAL_YEAR_Pos)
1759#define RTC_CAL_TENYEAR_Pos (20)
1760#define RTC_CAL_TENYEAR_Msk (0xful << RTC_CAL_TENYEAR_Pos)
1762#define RTC_CLKFMT_24HEN_Pos (0)
1763#define RTC_CLKFMT_24HEN_Msk (0x1ul << RTC_CLKFMT_24HEN_Pos)
1765#define RTC_WEEKDAY_WEEKDAY_Pos (0)
1766#define RTC_WEEKDAY_WEEKDAY_Msk (0x7ul << RTC_WEEKDAY_WEEKDAY_Pos)
1768#define RTC_TALM_SEC_Pos (0)
1769#define RTC_TALM_SEC_Msk (0xful << RTC_TALM_SEC_Pos)
1771#define RTC_TALM_TENSEC_Pos (4)
1772#define RTC_TALM_TENSEC_Msk (0x7ul << RTC_TALM_TENSEC_Pos)
1774#define RTC_TALM_MIN_Pos (8)
1775#define RTC_TALM_MIN_Msk (0xful << RTC_TALM_MIN_Pos)
1777#define RTC_TALM_TENMIN_Pos (12)
1778#define RTC_TALM_TENMIN_Msk (0x7ul << RTC_TALM_TENMIN_Pos)
1780#define RTC_TALM_HR_Pos (16)
1781#define RTC_TALM_HR_Msk (0xful << RTC_TALM_HR_Pos)
1783#define RTC_TALM_TENHR_Pos (20)
1784#define RTC_TALM_TENHR_Msk (0x3ul << RTC_TALM_TENHR_Pos)
1786#define RTC_CALM_DAY_Pos (0)
1787#define RTC_CALM_DAY_Msk (0xful << RTC_CALM_DAY_Pos)
1789#define RTC_CALM_TENDAY_Pos (4)
1790#define RTC_CALM_TENDAY_Msk (0x3ul << RTC_CALM_TENDAY_Pos)
1792#define RTC_CALM_MON_Pos (8)
1793#define RTC_CALM_MON_Msk (0xful << RTC_CALM_MON_Pos)
1795#define RTC_CALM_TENMON_Pos (12)
1796#define RTC_CALM_TENMON_Msk (0x1ul << RTC_CALM_TENMON_Pos)
1798#define RTC_CALM_YEAR_Pos (16)
1799#define RTC_CALM_YEAR_Msk (0xful << RTC_CALM_YEAR_Pos)
1801#define RTC_CALM_TENYEAR_Pos (20)
1802#define RTC_CALM_TENYEAR_Msk (0xful << RTC_CALM_TENYEAR_Pos)
1804#define RTC_LEAPYEAR_LEAPYEAR_Pos (0)
1805#define RTC_LEAPYEAR_LEAPYEAR_Msk (0x1ul << RTC_LEAPYEAR_LEAPYEAR_Pos)
1807#define RTC_INTEN_ALMIEN_Pos (0)
1808#define RTC_INTEN_ALMIEN_Msk (0x1ul << RTC_INTEN_ALMIEN_Pos)
1810#define RTC_INTEN_TICKIEN_Pos (1)
1811#define RTC_INTEN_TICKIEN_Msk (0x1ul << RTC_INTEN_TICKIEN_Pos)
1813#define RTC_INTEN_TAMP0IEN_Pos (8)
1814#define RTC_INTEN_TAMP0IEN_Msk (0x1ul << RTC_INTEN_TAMP0IEN_Pos)
1816#define RTC_INTEN_TAMP1IEN_Pos (9)
1817#define RTC_INTEN_TAMP1IEN_Msk (0x1ul << RTC_INTEN_TAMP1IEN_Pos)
1819#define RTC_INTEN_TAMP2IEN_Pos (10)
1820#define RTC_INTEN_TAMP2IEN_Msk (0x1ul << RTC_INTEN_TAMP2IEN_Pos)
1822#define RTC_INTEN_TAMP3IEN_Pos (11)
1823#define RTC_INTEN_TAMP3IEN_Msk (0x1ul << RTC_INTEN_TAMP3IEN_Pos)
1825#define RTC_INTEN_TAMP4IEN_Pos (12)
1826#define RTC_INTEN_TAMP4IEN_Msk (0x1ul << RTC_INTEN_TAMP4IEN_Pos)
1828#define RTC_INTEN_TAMP5IEN_Pos (13)
1829#define RTC_INTEN_TAMP5IEN_Msk (0x1ul << RTC_INTEN_TAMP5IEN_Pos)
1831#define RTC_INTSTS_ALMIF_Pos (0)
1832#define RTC_INTSTS_ALMIF_Msk (0x1ul << RTC_INTSTS_ALMIF_Pos)
1834#define RTC_INTSTS_TICKIF_Pos (1)
1835#define RTC_INTSTS_TICKIF_Msk (0x1ul << RTC_INTSTS_TICKIF_Pos)
1837#define RTC_INTSTS_TAMP0IF_Pos (8)
1838#define RTC_INTSTS_TAMP0IF_Msk (0x1ul << RTC_INTSTS_TAMP0IF_Pos)
1840#define RTC_INTSTS_TAMP1IF_Pos (9)
1841#define RTC_INTSTS_TAMP1IF_Msk (0x1ul << RTC_INTSTS_TAMP1IF_Pos)
1843#define RTC_INTSTS_TAMP2IF_Pos (10)
1844#define RTC_INTSTS_TAMP2IF_Msk (0x1ul << RTC_INTSTS_TAMP2IF_Pos)
1846#define RTC_INTSTS_TAMP3IF_Pos (11)
1847#define RTC_INTSTS_TAMP3IF_Msk (0x1ul << RTC_INTSTS_TAMP3IF_Pos)
1849#define RTC_INTSTS_TAMP4IF_Pos (12)
1850#define RTC_INTSTS_TAMP4IF_Msk (0x1ul << RTC_INTSTS_TAMP4IF_Pos)
1852#define RTC_INTSTS_TAMP5IF_Pos (13)
1853#define RTC_INTSTS_TAMP5IF_Msk (0x1ul << RTC_INTSTS_TAMP5IF_Pos)
1855#define RTC_TICK_TICK_Pos (0)
1856#define RTC_TICK_TICK_Msk (0x7ul << RTC_TICK_TICK_Pos)
1858#define RTC_TAMSK_MSEC_Pos (0)
1859#define RTC_TAMSK_MSEC_Msk (0x1ul << RTC_TAMSK_MSEC_Pos)
1861#define RTC_TAMSK_MTENSEC_Pos (1)
1862#define RTC_TAMSK_MTENSEC_Msk (0x1ul << RTC_TAMSK_MTENSEC_Pos)
1864#define RTC_TAMSK_MMIN_Pos (2)
1865#define RTC_TAMSK_MMIN_Msk (0x1ul << RTC_TAMSK_MMIN_Pos)
1867#define RTC_TAMSK_MTENMIN_Pos (3)
1868#define RTC_TAMSK_MTENMIN_Msk (0x1ul << RTC_TAMSK_MTENMIN_Pos)
1870#define RTC_TAMSK_MHR_Pos (4)
1871#define RTC_TAMSK_MHR_Msk (0x1ul << RTC_TAMSK_MHR_Pos)
1873#define RTC_TAMSK_MTENHR_Pos (5)
1874#define RTC_TAMSK_MTENHR_Msk (0x1ul << RTC_TAMSK_MTENHR_Pos)
1876#define RTC_CAMSK_MDAY_Pos (0)
1877#define RTC_CAMSK_MDAY_Msk (0x1ul << RTC_CAMSK_MDAY_Pos)
1879#define RTC_CAMSK_MTENDAY_Pos (1)
1880#define RTC_CAMSK_MTENDAY_Msk (0x1ul << RTC_CAMSK_MTENDAY_Pos)
1882#define RTC_CAMSK_MMON_Pos (2)
1883#define RTC_CAMSK_MMON_Msk (0x1ul << RTC_CAMSK_MMON_Pos)
1885#define RTC_CAMSK_MTENMON_Pos (3)
1886#define RTC_CAMSK_MTENMON_Msk (0x1ul << RTC_CAMSK_MTENMON_Pos)
1888#define RTC_CAMSK_MYEAR_Pos (4)
1889#define RTC_CAMSK_MYEAR_Msk (0x1ul << RTC_CAMSK_MYEAR_Pos)
1891#define RTC_CAMSK_MTENYEAR_Pos (5)
1892#define RTC_CAMSK_MTENYEAR_Msk (0x1ul << RTC_CAMSK_MTENYEAR_Pos)
1894#define RTC_SPRCTL_SPRRWEN_Pos (2)
1895#define RTC_SPRCTL_SPRRWEN_Msk (0x1ul << RTC_SPRCTL_SPRRWEN_Pos)
1897#define RTC_SPRCTL_SPRCSTS_Pos (5)
1898#define RTC_SPRCTL_SPRCSTS_Msk (0x1ul << RTC_SPRCTL_SPRCSTS_Pos)
1900#define RTC_SPR0_SPARE_Pos (0)
1901#define RTC_SPR0_SPARE_Msk (0xfffffffful << RTC_SPR0_SPARE_Pos)
1903#define RTC_SPR1_SPARE_Pos (0)
1904#define RTC_SPR1_SPARE_Msk (0xfffffffful << RTC_SPR1_SPARE_Pos)
1906#define RTC_SPR2_SPARE_Pos (0)
1907#define RTC_SPR2_SPARE_Msk (0xfffffffful << RTC_SPR2_SPARE_Pos)
1909#define RTC_SPR3_SPARE_Pos (0)
1910#define RTC_SPR3_SPARE_Msk (0xfffffffful << RTC_SPR3_SPARE_Pos)
1912#define RTC_SPR4_SPARE_Pos (0)
1913#define RTC_SPR4_SPARE_Msk (0xfffffffful << RTC_SPR4_SPARE_Pos)
1915#define RTC_SPR5_SPARE_Pos (0)
1916#define RTC_SPR5_SPARE_Msk (0xfffffffful << RTC_SPR5_SPARE_Pos)
1918#define RTC_SPR6_SPARE_Pos (0)
1919#define RTC_SPR6_SPARE_Msk (0xfffffffful << RTC_SPR6_SPARE_Pos)
1921#define RTC_SPR7_SPARE_Pos (0)
1922#define RTC_SPR7_SPARE_Msk (0xfffffffful << RTC_SPR7_SPARE_Pos)
1924#define RTC_SPR8_SPARE_Pos (0)
1925#define RTC_SPR8_SPARE_Msk (0xfffffffful << RTC_SPR8_SPARE_Pos)
1927#define RTC_SPR9_SPARE_Pos (0)
1928#define RTC_SPR9_SPARE_Msk (0xfffffffful << RTC_SPR9_SPARE_Pos)
1930#define RTC_SPR10_SPARE_Pos (0)
1931#define RTC_SPR10_SPARE_Msk (0xfffffffful << RTC_SPR10_SPARE_Pos)
1933#define RTC_SPR11_SPARE_Pos (0)
1934#define RTC_SPR11_SPARE_Msk (0xfffffffful << RTC_SPR11_SPARE_Pos)
1936#define RTC_SPR12_SPARE_Pos (0)
1937#define RTC_SPR12_SPARE_Msk (0xfffffffful << RTC_SPR12_SPARE_Pos)
1939#define RTC_SPR13_SPARE_Pos (0)
1940#define RTC_SPR13_SPARE_Msk (0xfffffffful << RTC_SPR13_SPARE_Pos)
1942#define RTC_SPR14_SPARE_Pos (0)
1943#define RTC_SPR14_SPARE_Msk (0xfffffffful << RTC_SPR14_SPARE_Pos)
1945#define RTC_SPR15_SPARE_Pos (0)
1946#define RTC_SPR15_SPARE_Msk (0xfffffffful << RTC_SPR15_SPARE_Pos)
1948#define RTC_SPR16_SPARE_Pos (0)
1949#define RTC_SPR16_SPARE_Msk (0xfffffffful << RTC_SPR16_SPARE_Pos)
1951#define RTC_SPR17_SPARE_Pos (0)
1952#define RTC_SPR17_SPARE_Msk (0xfffffffful << RTC_SPR17_SPARE_Pos)
1954#define RTC_SPR18_SPARE_Pos (0)
1955#define RTC_SPR18_SPARE_Msk (0xfffffffful << RTC_SPR18_SPARE_Pos)
1957#define RTC_SPR19_SPARE_Pos (0)
1958#define RTC_SPR19_SPARE_Msk (0xfffffffful << RTC_SPR19_SPARE_Pos)
1960#define RTC_LXTCTL_GAIN_Pos (1)
1961#define RTC_LXTCTL_GAIN_Msk (0x3ul << RTC_LXTCTL_GAIN_Pos)
1963#define RTC_GPIOCTL0_OPMODE0_Pos (0)
1964#define RTC_GPIOCTL0_OPMODE0_Msk (0x3ul << RTC_GPIOCTL0_OPMODE0_Pos)
1966#define RTC_GPIOCTL0_DOUT0_Pos (2)
1967#define RTC_GPIOCTL0_DOUT0_Msk (0x1ul << RTC_GPIOCTL0_DOUT0_Pos)
1969#define RTC_GPIOCTL0_CTLSEL0_Pos (3)
1970#define RTC_GPIOCTL0_CTLSEL0_Msk (0x1ul << RTC_GPIOCTL0_CTLSEL0_Pos)
1972#define RTC_GPIOCTL0_PUSEL0_Pos (4)
1973#define RTC_GPIOCTL0_PUSEL0_Msk (0x3ul << RTC_GPIOCTL0_PUSEL0_Pos)
1975#define RTC_GPIOCTL0_OPMODE1_Pos (8)
1976#define RTC_GPIOCTL0_OPMODE1_Msk (0x3ul << RTC_GPIOCTL0_OPMODE1_Pos)
1978#define RTC_GPIOCTL0_DOUT1_Pos (10)
1979#define RTC_GPIOCTL0_DOUT1_Msk (0x1ul << RTC_GPIOCTL0_DOUT1_Pos)
1981#define RTC_GPIOCTL0_CTLSEL1_Pos (11)
1982#define RTC_GPIOCTL0_CTLSEL1_Msk (0x1ul << RTC_GPIOCTL0_CTLSEL1_Pos)
1984#define RTC_GPIOCTL0_PUSEL1_Pos (12)
1985#define RTC_GPIOCTL0_PUSEL1_Msk (0x3ul << RTC_GPIOCTL0_PUSEL1_Pos)
1987#define RTC_GPIOCTL0_OPMODE2_Pos (16)
1988#define RTC_GPIOCTL0_OPMODE2_Msk (0x3ul << RTC_GPIOCTL0_OPMODE2_Pos)
1990#define RTC_GPIOCTL0_DOUT2_Pos (18)
1991#define RTC_GPIOCTL0_DOUT2_Msk (0x1ul << RTC_GPIOCTL0_DOUT2_Pos)
1993#define RTC_GPIOCTL0_CTLSEL2_Pos (19)
1994#define RTC_GPIOCTL0_CTLSEL2_Msk (0x1ul << RTC_GPIOCTL0_CTLSEL2_Pos)
1996#define RTC_GPIOCTL0_PUSEL2_Pos (20)
1997#define RTC_GPIOCTL0_PUSEL2_Msk (0x3ul << RTC_GPIOCTL0_PUSEL2_Pos)
1999#define RTC_GPIOCTL0_OPMODE3_Pos (24)
2000#define RTC_GPIOCTL0_OPMODE3_Msk (0x3ul << RTC_GPIOCTL0_OPMODE3_Pos)
2002#define RTC_GPIOCTL0_DOUT3_Pos (26)
2003#define RTC_GPIOCTL0_DOUT3_Msk (0x1ul << RTC_GPIOCTL0_DOUT3_Pos)
2005#define RTC_GPIOCTL0_CTLSEL3_Pos (27)
2006#define RTC_GPIOCTL0_CTLSEL3_Msk (0x1ul << RTC_GPIOCTL0_CTLSEL3_Pos)
2008#define RTC_GPIOCTL0_PUSEL3_Pos (28)
2009#define RTC_GPIOCTL0_PUSEL3_Msk (0x3ul << RTC_GPIOCTL0_PUSEL3_Pos)
2011#define RTC_GPIOCTL1_OPMODE4_Pos (0)
2012#define RTC_GPIOCTL1_OPMODE4_Msk (0x3ul << RTC_GPIOCTL1_OPMODE4_Pos)
2014#define RTC_GPIOCTL1_DOUT4_Pos (2)
2015#define RTC_GPIOCTL1_DOUT4_Msk (0x1ul << RTC_GPIOCTL1_DOUT4_Pos)
2017#define RTC_GPIOCTL1_CTLSEL4_Pos (3)
2018#define RTC_GPIOCTL1_CTLSEL4_Msk (0x1ul << RTC_GPIOCTL1_CTLSEL4_Pos)
2020#define RTC_GPIOCTL1_PUSEL4_Pos (4)
2021#define RTC_GPIOCTL1_PUSEL4_Msk (0x3ul << RTC_GPIOCTL1_PUSEL4_Pos)
2023#define RTC_GPIOCTL1_OPMODE5_Pos (8)
2024#define RTC_GPIOCTL1_OPMODE5_Msk (0x3ul << RTC_GPIOCTL1_OPMODE5_Pos)
2026#define RTC_GPIOCTL1_DOUT5_Pos (10)
2027#define RTC_GPIOCTL1_DOUT5_Msk (0x1ul << RTC_GPIOCTL1_DOUT5_Pos)
2029#define RTC_GPIOCTL1_CTLSEL5_Pos (11)
2030#define RTC_GPIOCTL1_CTLSEL5_Msk (0x1ul << RTC_GPIOCTL1_CTLSEL5_Pos)
2032#define RTC_GPIOCTL1_PUSEL5_Pos (12)
2033#define RTC_GPIOCTL1_PUSEL5_Msk (0x3ul << RTC_GPIOCTL1_PUSEL5_Pos)
2035#define RTC_GPIOCTL1_OPMODE6_Pos (16)
2036#define RTC_GPIOCTL1_OPMODE6_Msk (0x3ul << RTC_GPIOCTL1_OPMODE6_Pos)
2038#define RTC_GPIOCTL1_DOUT6_Pos (18)
2039#define RTC_GPIOCTL1_DOUT6_Msk (0x1ul << RTC_GPIOCTL1_DOUT6_Pos)
2041#define RTC_GPIOCTL1_CTLSEL6_Pos (19)
2042#define RTC_GPIOCTL1_CTLSEL6_Msk (0x1ul << RTC_GPIOCTL1_CTLSEL6_Pos)
2044#define RTC_GPIOCTL1_PUSEL6_Pos (20)
2045#define RTC_GPIOCTL1_PUSEL6_Msk (0x3ul << RTC_GPIOCTL1_PUSEL6_Pos)
2047#define RTC_GPIOCTL1_OPMODE7_Pos (24)
2048#define RTC_GPIOCTL1_OPMODE7_Msk (0x3ul << RTC_GPIOCTL1_OPMODE7_Pos)
2050#define RTC_GPIOCTL1_DOUT7_Pos (26)
2051#define RTC_GPIOCTL1_DOUT7_Msk (0x1ul << RTC_GPIOCTL1_DOUT7_Pos)
2053#define RTC_GPIOCTL1_CTLSEL7_Pos (27)
2054#define RTC_GPIOCTL1_CTLSEL7_Msk (0x1ul << RTC_GPIOCTL1_CTLSEL7_Pos)
2056#define RTC_GPIOCTL1_PUSEL7_Pos (28)
2057#define RTC_GPIOCTL1_PUSEL7_Msk (0x3ul << RTC_GPIOCTL1_PUSEL7_Pos)
2059#define RTC_DSTCTL_ADDHR_Pos (0)
2060#define RTC_DSTCTL_ADDHR_Msk (0x1ul << RTC_DSTCTL_ADDHR_Pos)
2062#define RTC_DSTCTL_SUBHR_Pos (1)
2063#define RTC_DSTCTL_SUBHR_Msk (0x1ul << RTC_DSTCTL_SUBHR_Pos)
2065#define RTC_DSTCTL_DSBAK_Pos (2)
2066#define RTC_DSTCTL_DSBAK_Msk (0x1ul << RTC_DSTCTL_DSBAK_Pos)
2068#define RTC_TAMPCTL_DYN1ISS_Pos (0)
2069#define RTC_TAMPCTL_DYN1ISS_Msk (0x1ul << RTC_TAMPCTL_DYN1ISS_Pos)
2071#define RTC_TAMPCTL_DYN2ISS_Pos (1)
2072#define RTC_TAMPCTL_DYN2ISS_Msk (0x1ul << RTC_TAMPCTL_DYN2ISS_Pos)
2074#define RTC_TAMPCTL_DYNSRC_Pos (2)
2075#define RTC_TAMPCTL_DYNSRC_Msk (0x3ul << RTC_TAMPCTL_DYNSRC_Pos)
2077#define RTC_TAMPCTL_SEEDRLD_Pos (4)
2078#define RTC_TAMPCTL_SEEDRLD_Msk (0x1ul << RTC_TAMPCTL_SEEDRLD_Pos)
2080#define RTC_TAMPCTL_DYNRATE_Pos (5)
2081#define RTC_TAMPCTL_DYNRATE_Msk (0x7ul << RTC_TAMPCTL_DYNRATE_Pos)
2083#define RTC_TAMPCTL_TAMP0EN_Pos (8)
2084#define RTC_TAMPCTL_TAMP0EN_Msk (0x1ul << RTC_TAMPCTL_TAMP0EN_Pos)
2086#define RTC_TAMPCTL_TAMP0LV_Pos (9)
2087#define RTC_TAMPCTL_TAMP0LV_Msk (0x1ul << RTC_TAMPCTL_TAMP0LV_Pos)
2089#define RTC_TAMPCTL_TAMP0DBEN_Pos (10)
2090#define RTC_TAMPCTL_TAMP0DBEN_Msk (0x1ul << RTC_TAMPCTL_TAMP0DBEN_Pos)
2092#define RTC_TAMPCTL_TAMP1EN_Pos (12)
2093#define RTC_TAMPCTL_TAMP1EN_Msk (0x1ul << RTC_TAMPCTL_TAMP1EN_Pos)
2095#define RTC_TAMPCTL_TAMP1LV_Pos (13)
2096#define RTC_TAMPCTL_TAMP1LV_Msk (0x1ul << RTC_TAMPCTL_TAMP1LV_Pos)
2098#define RTC_TAMPCTL_TAMP1DBEN_Pos (14)
2099#define RTC_TAMPCTL_TAMP1DBEN_Msk (0x1ul << RTC_TAMPCTL_TAMP1DBEN_Pos)
2101#define RTC_TAMPCTL_DYNPR0EN_Pos (15)
2102#define RTC_TAMPCTL_DYNPR0EN_Msk (0x1ul << RTC_TAMPCTL_DYNPR0EN_Pos)
2104#define RTC_TAMPCTL_TAMP2EN_Pos (16)
2105#define RTC_TAMPCTL_TAMP2EN_Msk (0x1ul << RTC_TAMPCTL_TAMP2EN_Pos)
2107#define RTC_TAMPCTL_TAMP2LV_Pos (17)
2108#define RTC_TAMPCTL_TAMP2LV_Msk (0x1ul << RTC_TAMPCTL_TAMP2LV_Pos)
2110#define RTC_TAMPCTL_TAMP2DBEN_Pos (18)
2111#define RTC_TAMPCTL_TAMP2DBEN_Msk (0x1ul << RTC_TAMPCTL_TAMP2DBEN_Pos)
2113#define RTC_TAMPCTL_TAMP3EN_Pos (20)
2114#define RTC_TAMPCTL_TAMP3EN_Msk (0x1ul << RTC_TAMPCTL_TAMP3EN_Pos)
2116#define RTC_TAMPCTL_TAMP3LV_Pos (21)
2117#define RTC_TAMPCTL_TAMP3LV_Msk (0x1ul << RTC_TAMPCTL_TAMP3LV_Pos)
2119#define RTC_TAMPCTL_TAMP3DBEN_Pos (22)
2120#define RTC_TAMPCTL_TAMP3DBEN_Msk (0x1ul << RTC_TAMPCTL_TAMP3DBEN_Pos)
2122#define RTC_TAMPCTL_DYNPR1EN_Pos (23)
2123#define RTC_TAMPCTL_DYNPR1EN_Msk (0x1ul << RTC_TAMPCTL_DYNPR1EN_Pos)
2125#define RTC_TAMPCTL_TAMP4EN_Pos (24)
2126#define RTC_TAMPCTL_TAMP4EN_Msk (0x1ul << RTC_TAMPCTL_TAMP4EN_Pos)
2128#define RTC_TAMPCTL_TAMP4LV_Pos (25)
2129#define RTC_TAMPCTL_TAMP4LV_Msk (0x1ul << RTC_TAMPCTL_TAMP4LV_Pos)
2131#define RTC_TAMPCTL_TAMP4DBEN_Pos (26)
2132#define RTC_TAMPCTL_TAMP4DBEN_Msk (0x1ul << RTC_TAMPCTL_TAMP4DBEN_Pos)
2134#define RTC_TAMPCTL_TAMP5EN_Pos (28)
2135#define RTC_TAMPCTL_TAMP5EN_Msk (0x1ul << RTC_TAMPCTL_TAMP5EN_Pos)
2137#define RTC_TAMPCTL_TAMP5LV_Pos (29)
2138#define RTC_TAMPCTL_TAMP5LV_Msk (0x1ul << RTC_TAMPCTL_TAMP5LV_Pos)
2140#define RTC_TAMPCTL_TAMP5DBEN_Pos (30)
2141#define RTC_TAMPCTL_TAMP5DBEN_Msk (0x1ul << RTC_TAMPCTL_TAMP5DBEN_Pos)
2143#define RTC_TAMPCTL_DYNPR2EN_Pos (31)
2144#define RTC_TAMPCTL_DYNPR2EN_Msk (0x1ul << RTC_TAMPCTL_DYNPR2EN_Pos)
2146#define RTC_TAMPSEED_SEED_Pos (0)
2147#define RTC_TAMPSEED_SEED_Msk (0xfffffffful << RTC_TAMPSEED_SEED_Pos)
2149#define RTC_TAMPTIME_SEC_Pos (0)
2150#define RTC_TAMPTIME_SEC_Msk (0xful << RTC_TAMPTIME_SEC_Pos)
2152#define RTC_TAMPTIME_TENSEC_Pos (4)
2153#define RTC_TAMPTIME_TENSEC_Msk (0x7ul << RTC_TAMPTIME_TENSEC_Pos)
2155#define RTC_TAMPTIME_MIN_Pos (8)
2156#define RTC_TAMPTIME_MIN_Msk (0xful << RTC_TAMPTIME_MIN_Pos)
2158#define RTC_TAMPTIME_TENMIN_Pos (12)
2159#define RTC_TAMPTIME_TENMIN_Msk (0x7ul << RTC_TAMPTIME_TENMIN_Pos)
2161#define RTC_TAMPTIME_HR_Pos (16)
2162#define RTC_TAMPTIME_HR_Msk (0xful << RTC_TAMPTIME_HR_Pos)
2164#define RTC_TAMPTIME_TENHR_Pos (20)
2165#define RTC_TAMPTIME_TENHR_Msk (0x3ul << RTC_TAMPTIME_TENHR_Pos)
2167#define RTC_TAMPCAL_DAY_Pos (0)
2168#define RTC_TAMPCAL_DAY_Msk (0xful << RTC_TAMPCAL_DAY_Pos)
2170#define RTC_TAMPCAL_TENDAY_Pos (4)
2171#define RTC_TAMPCAL_TENDAY_Msk (0x3ul << RTC_TAMPCAL_TENDAY_Pos)
2173#define RTC_TAMPCAL_MON_Pos (8)
2174#define RTC_TAMPCAL_MON_Msk (0xful << RTC_TAMPCAL_MON_Pos)
2176#define RTC_TAMPCAL_TENMON_Pos (12)
2177#define RTC_TAMPCAL_TENMON_Msk (0x1ul << RTC_TAMPCAL_TENMON_Pos)
2179#define RTC_TAMPCAL_YEAR_Pos (16)
2180#define RTC_TAMPCAL_YEAR_Msk (0xful << RTC_TAMPCAL_YEAR_Pos)
2182#define RTC_TAMPCAL_TENYEAR_Pos (20)
2183#define RTC_TAMPCAL_TENYEAR_Msk (0xful << RTC_TAMPCAL_TENYEAR_Pos) /* RTC_CONST */ /* end of RTC register group */ /* end of REGISTER group */
2189
2190#if defined ( __CC_ARM )
2191#pragma no_anon_unions
2192#endif
2193
2194#endif /* __RTC_REG_H__ */
Definition: rtc_reg.h:27
__IO uint32_t CLKFMT
Definition: rtc_reg.h:1659
__IO uint32_t GPIOCTL0
Definition: rtc_reg.h:1675
__IO uint32_t LXTCTL
Definition: rtc_reg.h:1674
__IO uint32_t TAMPSEED
Definition: rtc_reg.h:1688
__IO uint32_t TAMPCTL
Definition: rtc_reg.h:1684
__IO uint32_t RWEN
Definition: rtc_reg.h:1655
__IO uint32_t FREQADJ
Definition: rtc_reg.h:1656
__IO uint32_t CAMSK
Definition: rtc_reg.h:1668
__IO uint32_t INTSTS
Definition: rtc_reg.h:1665
__IO uint32_t DSTCTL
Definition: rtc_reg.h:1680
__IO uint32_t TAMSK
Definition: rtc_reg.h:1667
__I uint32_t TAMPTIME
Definition: rtc_reg.h:1692
__IO uint32_t INIT
Definition: rtc_reg.h:1654
__I uint32_t LEAPYEAR
Definition: rtc_reg.h:1663
__IO uint32_t SPRCTL
Definition: rtc_reg.h:1669
__IO uint32_t TALM
Definition: rtc_reg.h:1661
__IO uint32_t CALM
Definition: rtc_reg.h:1662
__IO uint32_t INTEN
Definition: rtc_reg.h:1664
__IO uint32_t TIME
Definition: rtc_reg.h:1657
__IO uint32_t CAL
Definition: rtc_reg.h:1658
__IO uint32_t TICK
Definition: rtc_reg.h:1666
__IO uint32_t WEEKDAY
Definition: rtc_reg.h:1660
__I uint32_t TAMPCAL
Definition: rtc_reg.h:1693
__IO uint32_t GPIOCTL1
Definition: rtc_reg.h:1676