32 #define PWM_CHANNEL_NUM (6) 33 #define PWM_CLK_DIV_1 (4UL) 34 #define PWM_CLK_DIV_2 (0UL) 35 #define PWM_CLK_DIV_4 (1UL) 36 #define PWM_CLK_DIV_8 (2UL) 37 #define PWM_CLK_DIV_16 (3UL) 38 #define PWM_EDGE_ALIGNED (0UL) 39 #define PWM_CENTER_ALIGNED (PWM_PCR_PWMTYPE_Msk) 40 #define PWM_TRIGGER_ADC_CNTR_IS_0 PWM_TRGCON0_P0TRGEN_Msk 41 #define PWM_TRIGGER_ADC_CNTR_IS_CMR_D PWM_TRGCON0_CM0TRGFEN_Msk 42 #define PWM_TRIGGER_ADC_CNTR_IS_CNR PWM_TRGCON0_CNT0TRGEN_Msk 43 #define PWM_TRIGGER_ADC_CNTR_IS_CMR_U PWM_TRGCON0_CM0TRGREN_Msk 44 #define PWM_FB0_EINT0 (PWM_PFBCON_BKEN0_Msk) 45 #define PWM_FB0_ACMP1 (PWM_PFBCON_BKEN0_Msk | PWM_PFBCON_CPO1BKEN_Msk) 46 #define PWM_FB1_EINT1 (PWM_PFBCON_BKEN1_Msk) 47 #define PWM_FB1_ACMP0 (PWM_PFBCON_BKEN1_Msk | PWM_PFBCON_CPO0BKEN_Msk) 48 #define PWM_PERIOD_INT_UNDERFLOW (0) 49 #define PWM_PERIOD_INT_MATCH_CNR (PWM_PIER_INT_TYPE_Msk) 64 #define PWM_ENABLE_COMPLEMENTARY_MODE(pwm) (PWM->PCR = (PWM->PCR & ~PWM_PCR_PWMMOD_Msk) |(1UL << PWM_PCR_PWMMOD_Pos)) 72 #define PWM_DISABLE_COMPLEMENTARY_MODE(pwm) (PWM->PCR &= ~PWM_PCR_PWMMOD_Msk) 80 #define PWM_ENABLE_GROUP_MODE(pwm) (PWM->PCR |= PWM_PCR_GRP_Msk) 88 #define PWM_DISABLE_GROUP_MODE(pwm) (PWM->PCR &= ~PWM_PCR_GRP_Msk) 96 #define PWM_ENABLE_SYNC_MODE(pwm) (PWM->PCR = (PWM->PCR & ~PWM_PCR_PWMMOD_Msk) |(2UL << PWM_PCR_PWMMOD_Pos)) 104 #define PWM_DISABLE_SYNC_MODE(pwm) (PWM->PCR &= ~PWM_PCR_PWMMOD_Msk) 114 #define PWM_ENABLE_OUTPUT_INVERTER(pwm, u32ChannelMask) \ 117 for(i = 0; i < 6; i++) { \ 118 if((u32ChannelMask) & (1 << i)) {\ 119 PWM->PCR |= (1 << (PWM_PCR_CH0INV_Pos + (i * 4))); \ 134 #define PWM_SET_PRESCALER(pwm, u32ChannelNum, u32Prescaler) \ 135 (PWM->PPR = (PWM->PPR & ~(PWM_PPR_CP01_Msk << (((u32ChannelNum) >> 1) * 8))) | ((u32Prescaler) << (((u32ChannelNum) >> 1) * 8))) 150 #define PWM_SET_DIVIDER(pwm, u32ChannelNum, u32Divider) \ 151 (PWM->CSR = (PWM->CSR & ~(PWM_CSR_CSR0_Msk << ((u32ChannelNum) * 4))) | ((u32Divider) << ((u32ChannelNum) * 4))) 162 #define PWM_SET_CMR(pwm, u32ChannelNum, u32CMR) (PWM->CMR[u32ChannelNum] = (u32CMR)) 174 #define PWM_SET_CNR(pwm, u32ChannelNum, u32CNR) (PWM->CNR[u32ChannelNum] = (u32CNR)) 186 #define PWM_SET_ALIGNED_TYPE(pwm, u32ChannelMask, u32AlignedType) \ 187 (PWM->PCR = (PWM->PCR & ~PWM_PCR_PWMTYPE_Msk) | (u32AlignedType)) 191 uint32_t u32ChannelNum,
192 uint32_t u32Frequency,
193 uint32_t u32DutyCycle);
202 uint32_t u32ChannelMask,
203 uint32_t u32LevelMask,
204 uint32_t u32BrakeSource);
uint32_t PWM_GetADCTriggerFlag(PWM_T *pwm, uint32_t u32ChannelNum)
This function get selected channel trigger ADC flag.
void PWM_ClearFaultBrakeFlag(PWM_T *pwm, uint32_t u32BrakeSource)
This function clear fault brake flag.
void PWM_EnableDeadZone(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Duration)
This function enable Dead zone of selected channel.
void PWM_ClearDutyIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
This function clears duty interrupt flag of selected channel.
void PWM_DisableDeadZone(PWM_T *pwm, uint32_t u32ChannelNum)
This function disable Dead zone of selected channel.
void PWM_ForceStop(PWM_T *pwm, uint32_t u32ChannelMask)
This function stop PWM generation immediately by clear channel enable bit.
void PWM_EnableOutput(PWM_T *pwm, uint32_t u32ChannelMask)
This function enables PWM output generation of selected channels.
void PWM_DisableOutput(PWM_T *pwm, uint32_t u32ChannelMask)
This function disables PWM output generation of selected channels.
uint32_t PWM_ConfigOutputChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle)
This function config PWM generator and get the nearest frequency in edge aligned auto-reload mode.
void PWM_ClearFaultBrakeIntFlag(PWM_T *pwm, uint32_t u32BrakeSource)
This function clear fault brake interrupt of selected source.
void PWM_EnableDutyInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32IntDutyType)
This function enable duty interrupt of selected channel.
void PWM_EnableFaultBrake(PWM_T *pwm, uint32_t u32ChannelMask, uint32_t u32LevelMask, uint32_t u32BrakeSource)
This function enable fault brake of selected channels.
void PWM_ClearADCTriggerFlag(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Condition)
This function clear selected channel trigger ADC flag.
void PWM_EnablePeriodInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32IntPeriodType)
This function enable period interrupt of selected channel.
void PWM_DisableFaultBrakeInt(PWM_T *pwm, uint32_t u32BrakeSource)
This function disable fault brake interrupt.
void PWM_EnableFaultBrakeInt(PWM_T *pwm, uint32_t u32BrakeSource)
This function enable fault brake interrupt.
void PWM_DisablePeriodInt(PWM_T *pwm, uint32_t u32ChannelNum)
This function disable period interrupt of selected channel.
void PWM_Start(PWM_T *pwm, uint32_t u32ChannelMask)
This function start PWM module.
void PWM_Stop(PWM_T *pwm, uint32_t u32ChannelMask)
This function stop PWM module.
void PWM_ClearPeriodIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
This function clear period interrupt of selected channel.
uint32_t PWM_GetDutyIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
This function get duty interrupt flag of selected channel.
void PWM_EnableADCTrigger(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Condition)
This function enable selected channel to trigger ADC.
void PWM_DisableDutyInt(PWM_T *pwm, uint32_t u32ChannelNum)
This function disable duty interrupt of selected channel.
uint32_t PWM_GetFaultBrakeIntFlag(PWM_T *pwm, uint32_t u32BrakeSource)
This function get fault brake interrupt of selected source.
void PWM_DisableADCTrigger(PWM_T *pwm, uint32_t u32ChannelNum)
This function disable selected channel to trigger ADC.
uint32_t PWM_GetPeriodIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
This function get period interrupt of selected channel.