MINI58_BSP V3.01.005
The Board Support Package for Mini58 Series MCU
adc.h
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1/**************************************************************************/
12#ifndef __ADC_H__
13#define __ADC_H__
14
15#ifdef __cplusplus
16extern "C"
17{
18#endif
19
20
33#define ADC_CH7_EXT (0UL)
34#define ADC_CH7_BGP (ADC_CHEN_CH7SEL_Msk)
35#define ADC_CMP0_LESS_THAN (0UL << ADC_CMP0_CMPCOND_Pos)
36#define ADC_CMP1_LESS_THAN (0UL << ADC_CMP1_CMPCOND_Pos)
37#define ADC_CMP0_GREATER_OR_EQUAL_TO (1ul << ADC_CMP0_CMPCOND_Pos)
38#define ADC_CMP1_GREATER_OR_EQUAL_TO (1ul << ADC_CMP1_CMPCOND_Pos)
39#define ADC_TRIGGER_BY_EXT_PIN (0UL)
40#define ADC_TRIGGER_BY_PWM (ADC_CTL_HWTRGSEL_Msk)
41#define ADC_FALLING_EDGE_TRIGGER (0UL)
42#define ADC_RISING_EDGE_TRIGGER (ADC_CTL_HWTRGCOND_Msk)
43#define ADC_ADIF_INT (ADC_STATUS_ADIF_Msk)
44#define ADC_CMP0_INT (ADC_STATUS_ADCMPF0_Msk)
45#define ADC_CMP1_INT (ADC_STATUS_ADCMPF1_Msk)
46#define ADC_SAMPLE_CLOCK_0 (0UL)
47#define ADC_SAMPLE_CLOCK_1 (1UL)
48#define ADC_SAMPLE_CLOCK_2 (2UL)
49#define ADC_SAMPLE_CLOCK_4 (3UL)
50#define ADC_SAMPLE_CLOCK_8 (4UL)
51#define ADC_SAMPLE_CLOCK_16 (5UL)
52#define ADC_SAMPLE_CLOCK_32 (6UL)
53#define ADC_SAMPLE_CLOCK_64 (7UL)
54#define ADC_SAMPLE_CLOCK_128 (8UL)
55#define ADC_SAMPLE_CLOCK_256 (9UL)
56#define ADC_SAMPLE_CLOCK_512 (10UL)
57#define ADC_SAMPLE_CLOCK_1024 (11UL)
58#define ADC_SEQMODE_TYPE_23SHUNT (0UL)
59#define ADC_SEQMODE_TYPE_1SHUNT (1UL)
60#define ADC_SEQMODE_MODESELECT_CH01 (0UL)
61#define ADC_SEQMODE_MODESELECT_CH12 (1UL)
62#define ADC_SEQMODE_MODESELECT_CH02 (2UL)
63#define ADC_SEQMODE_PWM0_RISING (0UL)
64#define ADC_SEQMODE_PWM0_CENTER (1UL)
65#define ADC_SEQMODE_PWM0_FALLING (2UL)
66#define ADC_SEQMODE_PWM0_PERIOD (3UL)
67#define ADC_SEQMODE_PWM2_RISING (4UL)
68#define ADC_SEQMODE_PWM2_CENTER (5UL)
69#define ADC_SEQMODE_PWM2_FALLING (6UL)
70#define ADC_SEQMODE_PWM2_PERIOD (7UL)
71#define ADC_SEQMODE_PWM4_RISING (8UL)
72#define ADC_SEQMODE_PWM4_CENTER (9UL)
73#define ADC_SEQMODE_PWM4_FALLING (10UL)
74#define ADC_SEQMODE_PWM4_PERIOD (11UL) /* end of group Mini58_ADC_EXPORTED_CONSTANTS */
76
77
93#define ADC_CONFIG_CH7(adc, u32Source) (ADC->CHEN = ((adc)->CHEN & ~ADC_CHEN_CH7SEL_Msk) | (u32Source))
94
102#define ADC_GET_CONVERSION_DATA(adc, u32ChNum) ((adc)->DAT & ADC_DAT_RESULT_Msk)
103
114#define ADC_GET_INT_FLAG(adc, u32Mask) ((adc)->STATUS & (u32Mask))
115
126#define ADC_CLR_INT_FLAG(adc, u32Mask) ((adc)->STATUS = ((adc)->STATUS & ~(ADC_STATUS_ADIF_Msk | \
127 ADC_STATUS_ADCMPF0_Msk | \
128 ADC_STATUS_ADCMPF1_Msk)) | (u32Mask))
129
138#define ADC_IS_BUSY(adc) ((adc)->STATUS & ADC_STATUS_BUSY_Msk ? 1 : 0)
139
149#define ADC_IS_DATA_OVERRUN(adc, u32ChNum) ((adc)->STATUS & ADC_STATUS_OV_Msk ? 1 : 0)
150
160#define ADC_IS_DATA_VALID(adc, u32ChNum) ((adc)->STATUS & ADC_STATUS_VALID_Msk ? 1 : 0)
161
168#define ADC_POWER_DOWN(adc) ((adc)->CTL &= ~ADC_CTL_ADCEN_Msk)
169
176#define ADC_POWER_ON(adc) ((adc)->CTL |= ADC_CTL_ADCEN_Msk)
177
193#define ADC_ENABLE_CMP0(adc, \
194 u32ChNum, \
195 u32Condition, \
196 u32Data, \
197 u32MatchCount) (ADC->CMP0 = ((u32ChNum) << ADC_CMP0_CMPCH_Pos) | \
198 (u32Condition) | \
199 ((u32Data) << ADC_CMP0_CMPDAT_Pos) | \
200 (((u32MatchCount) - 1) << ADC_CMP0_CMPMCNT_Pos) |\
201 ADC_CMP0_ADCMPIE_Msk |\
202 ADC_CMP0_ADCMPEN_Msk)
203
209#define ADC_DISABLE_CMP0(adc) ((adc)->CMP0 = 0)
210
226#define ADC_ENABLE_CMP1(adc, \
227 u32ChNum, \
228 u32Condition, \
229 u32Data, \
230 u32MatchCount) (ADC->CMP1 = ((u32ChNum) << ADC_CMP1_CMPCH_Pos) | \
231 (u32Condition) | \
232 ((u32Data) << ADC_CMP1_CMPDAT_Pos) | \
233 ((u32MatchCount - 1) << ADC_CMP1_CMPMCNT_Pos) |\
234 ADC_CMP1_ADCMPEN_Msk)
235
241#define ADC_DISABLE_CMP1(adc) ((adc)->CMP1 = 0)
242
252#define ADC_SET_INPUT_CHANNEL(adc, u32Mask) ((adc)->CHEN = (ADC->CHEN & ~ADC_CHEN_CHEN0_Msk) | (u32Mask))
253
260#define ADC_START_CONV(adc) ((adc)->CTL |= ADC_CTL_SWTRG_Msk)
261
268#define ADC_STOP_CONV(adc) ((adc)->CTL &= ~ADC_CTL_SWTRG_Msk)
269
270void ADC_Open(ADC_T *adc,
271 uint32_t u32InputMode,
272 uint32_t u32OpMode,
273 uint32_t u32ChMask);
274void ADC_Close(ADC_T *adc);
275void ADC_EnableHWTrigger(ADC_T *adc,
276 uint32_t u32Source,
277 uint32_t u32Param);
278void ADC_DisableHWTrigger(ADC_T *adc);
280 uint32_t u32ChNum,
281 uint32_t u32SampleTime);
282void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask);
283void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask);
284
285void ADC_SeqModeEnable(ADC_T *adc, uint32_t u32SeqTYPE, uint32_t u32ModeSel);
286void ADC_SeqModeTriggerSrc(ADC_T *adc, uint32_t u32SeqModeTriSrc1, uint32_t u32SeqModeTriSrc2);
287 /* end of group Mini58_ADC_EXPORTED_FUNCTIONS */
289 /* end of group Mini58_ADC_Driver */
291 /* end of group Mini58_Device_Driver */
293
294#ifdef __cplusplus
295}
296#endif
297
298#endif //__ADC_H__
299
300/*** (C) COPYRIGHT 2022 Nuvoton Technology Corp. ***/
void ADC_SeqModeTriggerSrc(ADC_T *adc, uint32_t u32SeqModeTriSrc1, uint32_t u32SeqModeTriSrc2)
ADC PWM Sequential Mode PWM Trigger Source and type.
Definition: adc.c:216
void ADC_EnableHWTrigger(ADC_T *adc, uint32_t u32Source, uint32_t u32Param)
Configure the hardware trigger condition and enable hardware trigger.
Definition: adc.c:81
void ADC_Close(ADC_T *adc)
Disable ADC module.
Definition: adc.c:59
void ADC_SeqModeEnable(ADC_T *adc, uint32_t u32SeqTYPE, uint32_t u32ModeSel)
ADC PWM Sequential Mode Control.
Definition: adc.c:193
void ADC_SetExtraSampleTime(ADC_T *adc, uint32_t u32ChNum, uint32_t u32SampleTime)
Set ADC sample time for designated channel.
Definition: adc.c:128
void ADC_Open(ADC_T *adc, uint32_t u32InputMode, uint32_t u32OpMode, uint32_t u32ChMask)
This API configures ADC module to be ready for convert the input from selected channel.
Definition: adc.c:38
void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
Disable the interrupt(s) selected by u32Mask parameter.
Definition: adc.c:169
void ADC_DisableHWTrigger(ADC_T *adc)
Disable hardware trigger ADC function.
Definition: adc.c:103
void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
Enable the interrupt(s) selected by u32Mask parameter.
Definition: adc.c:146