NUC029FAE_BSP V3.01.004
The Board Support Package for NUC029FAE MCU
Data Structures | Macros | Typedefs | Enumerations
NUC029FAE.h File Reference

NUC029FAE peripheral access layer header file. This file contains all the peripheral register's definitions, bits definitions and memory mapping for NuMicro NUC029FAE MCU. More...

#include "core_cm0.h"
#include "system_NUC029FAE.h"
#include <stdint.h>
#include "sys.h"
#include "clk.h"
#include "acmp.h"
#include "adc.h"
#include "fmc.h"
#include "gpio.h"
#include "i2c.h"
#include "pwm.h"
#include "spi.h"
#include "timer.h"
#include "uart.h"
#include "wdt.h"
Include dependency graph for NUC029FAE.h:
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Data Structures

struct  ACMP_T
 
struct  CLK_T
 
struct  ADC_T
 
struct  FMC_T
 
struct  GPIO_T
 
struct  GPIO_DBNCECON_T
 
struct  GPIOBIT_T
 
struct  I2C_T
 
struct  INT_T
 
struct  PWM_T
 
struct  SPI_T
 
struct  SYS_T
 
struct  TIMER_T
 
struct  UART_T
 
struct  WDT_T
 WDT register map. More...
 

Macros

#define __CM0_REV   0x0201
 
#define __NVIC_PRIO_BITS   2
 
#define __Vendor_SysTickConfig   0
 
#define __MPU_PRESENT   0
 
#define __FPU_PRESENT   0
 
#define FLASH_BASE   ((uint32_t)0x00000000)
 Flash base address. More...
 
#define SRAM_BASE   ((uint32_t)0x20000000)
 SRAM base address. More...
 
#define APB1PERIPH_BASE   ((uint32_t)0x40000000)
 APB1 base address. More...
 
#define APB2PERIPH_BASE   ((uint32_t)0x40100000)
 APB2 base address. More...
 
#define AHBPERIPH_BASE   ((uint32_t)0x50000000)
 AHB base address. More...
 
#define WDT_BASE   (APB1PERIPH_BASE + 0x04000)
 WDT register base address. More...
 
#define TIMER0_BASE   (APB1PERIPH_BASE + 0x10000)
 TIMER0 register base address. More...
 
#define TIMER1_BASE   (APB1PERIPH_BASE + 0x10020)
 TIMER1 register base address. More...
 
#define I2C_BASE   (APB1PERIPH_BASE + 0x20000)
 I2C register base address. More...
 
#define SPI_BASE   (APB1PERIPH_BASE + 0x30000)
 SPI register base address. More...
 
#define PWM_BASE   (APB1PERIPH_BASE + 0x40000)
 PWM register base address. More...
 
#define UART_BASE   (APB1PERIPH_BASE + 0x50000)
 UART register base address. More...
 
#define ACMP_BASE   (APB1PERIPH_BASE + 0xD0000)
 ACMP register base address. More...
 
#define ADC_BASE   (APB1PERIPH_BASE + 0xE0000)
 ADC register base address. More...
 
#define SYS_BASE   (AHBPERIPH_BASE + 0x00000)
 GCR register base address. More...
 
#define CLK_BASE   (AHBPERIPH_BASE + 0x00200)
 CLK register base address. More...
 
#define INT_BASE   (AHBPERIPH_BASE + 0x00300)
 INT register base address. More...
 
#define P0_BASE   (AHBPERIPH_BASE + 0x04000)
 GPIO Port 0 register base address. More...
 
#define P1_BASE   (AHBPERIPH_BASE + 0x04040)
 GPIO Port 1 register base address. More...
 
#define P2_BASE   (AHBPERIPH_BASE + 0x04080)
 GPIO Port 2 register base address. More...
 
#define P3_BASE   (AHBPERIPH_BASE + 0x040C0)
 GPIO Port 3 register base address. More...
 
#define P4_BASE   (AHBPERIPH_BASE + 0x04100)
 GPIO Port 4 register base address. More...
 
#define P5_BASE   (AHBPERIPH_BASE + 0x04140)
 GPIO Port 5 register base address. More...
 
#define GPIO_DBNCECON_BASE   (AHBPERIPH_BASE + 0x04180)
 GPIO De-bounce register vase. More...
 
#define GPIO_PIN_DATA_BASE   (AHBPERIPH_BASE + 0x04200)
 GPIO pin data register base address. More...
 
#define GPIOBIT0_BASE   (AHBPERIPH_BASE + 0x04200)
 GPIO Port 0 bit access register base address. More...
 
#define GPIOBIT1_BASE   (AHBPERIPH_BASE + 0x04220)
 GPIO Port 1 bit access register base address. More...
 
#define GPIOBIT2_BASE   (AHBPERIPH_BASE + 0x04240)
 GPIO Port 2 bit access register base address. More...
 
#define GPIOBIT3_BASE   (AHBPERIPH_BASE + 0x04260)
 GPIO Port 3 bit access register base address. More...
 
#define GPIOBIT4_BASE   (AHBPERIPH_BASE + 0x04280)
 GPIO Port 4 bit access register base address. More...
 
#define GPIOBIT5_BASE   (AHBPERIPH_BASE + 0x042A0)
 GPIO Port 5 bit access register base address. More...
 
#define FMC_BASE   (AHBPERIPH_BASE + 0x0C000)
 FMC register base address. More...
 
#define WDT   ((WDT_T *) WDT_BASE)
 Pointer to WDT register structure. More...
 
#define TIMER0   ((TIMER_T *) TIMER0_BASE)
 Pointer to Timer 0 register structure. More...
 
#define TIMER1   ((TIMER_T *) TIMER1_BASE)
 Pointer to Timer 1 register structure. More...
 
#define I2C   ((I2C_T *) I2C_BASE)
 Pointer to I2C register structure. More...
 
#define SPI   ((SPI_T *) SPI_BASE)
 Pointer to SPI register structure. More...
 
#define PWM   ((PWM_T *) PWM_BASE)
 Pointer to PWM register structure. More...
 
#define UART   ((UART_T *) UART_BASE)
 Pointer to UART register structure. More...
 
#define ADC   ((ADC_T *) ADC_BASE)
 Pointer to ADC register structure. More...
 
#define ACMP   ((ACMP_T *) ACMP_BASE)
 Pointer to ACMP register structure. More...
 
#define SYS   ((SYS_T *) SYS_BASE)
 Pointer to SYS register structure. More...
 
#define CLK   ((CLK_T *) CLK_BASE)
 Pointer to CLK register structure. More...
 
#define INT   ((INT_T *) INT_BASE)
 Pointer to INT register structure. More...
 
#define P0   ((GPIO_T *) P0_BASE)
 Pointer to GPIO port 0 register structure. More...
 
#define P1   ((GPIO_T *) P1_BASE)
 Pointer to GPIO port 1 register structure. More...
 
#define P2   ((GPIO_T *) P2_BASE)
 Pointer to GPIO port 2 register structure. More...
 
#define P3   ((GPIO_T *) P3_BASE)
 Pointer to GPIO port 3 register structure. More...
 
#define P4   ((GPIO_T *) P4_BASE)
 Pointer to GPIO port 4 register structure. More...
 
#define P5   ((GPIO_T *) P5_BASE)
 Pointer to GPIO port 5 register structure. More...
 
#define GPIO   ((GPIO_DBNCECON_T *) GPIO_DBNCECON_BASE)
 Pointer to GPIO de-bounce register structure. More...
 
#define GPIOBIT0   ((GPIOBIT_T *) GPIOBIT0_BASE)
 Pointer to GPIO port 0 bit access register structure. More...
 
#define GPIOBIT1   ((GPIOBIT_T *) GPIOBIT1_BASE)
 Pointer to GPIO port 1 bit access register structure. More...
 
#define GPIOBIT2   ((GPIOBIT_T *) GPIOBIT2_BASE)
 Pointer to GPIO port 2 bit access register structure. More...
 
#define GPIOBIT3   ((GPIOBIT_T *) GPIOBIT3_BASE)
 Pointer to GPIO port 3 bit access register structure. More...
 
#define GPIOBIT4   ((GPIOBIT_T *) GPIOBIT4_BASE)
 Pointer to GPIO port 4 bit access register structure. More...
 
#define GPIOBIT5   ((GPIOBIT_T *) GPIOBIT5_BASE)
 Pointer to GPIO port 5 bit access register structure. More...
 
#define FMC   ((FMC_T *) FMC_BASE)
 Pointer to FMC register structure. More...
 
#define M8(addr)   (*((vu8 *) (addr)))
 Get a 8-bit unsigned value from specified address. More...
 
#define M16(addr)   (*((vu16 *) (addr)))
 Get a 16-bit unsigned value from specified address. More...
 
#define M32(addr)   (*((vu32 *) (addr)))
 Get a 32-bit unsigned value from specified address. More...
 
#define outpw(port, value)   *((volatile unsigned int *)(port)) = value
 Set a 32-bit unsigned value to specified I/O port. More...
 
#define inpw(port)   (*((volatile unsigned int *)(port)))
 Get a 32-bit unsigned value from specified I/O port. More...
 
#define outps(port, value)   *((volatile unsigned short *)(port)) = value
 Set a 16-bit unsigned value to specified I/O port. More...
 
#define inps(port)   (*((volatile unsigned short *)(port)))
 Get a 16-bit unsigned value from specified I/O port. More...
 
#define outpb(port, value)   *((volatile unsigned char *)(port)) = value
 Set a 8-bit unsigned value to specified I/O port. More...
 
#define inpb(port)   (*((volatile unsigned char *)(port)))
 Get a 8-bit unsigned value from specified I/O port. More...
 
#define outp32(port, value)   *((volatile unsigned int *)(port)) = value
 Set a 32-bit unsigned value to specified I/O port. More...
 
#define inp32(port)   (*((volatile unsigned int *)(port)))
 Get a 32-bit unsigned value from specified I/O port. More...
 
#define outp16(port, value)   *((volatile unsigned short *)(port)) = value
 Set a 16-bit unsigned value to specified I/O port. More...
 
#define inp16(port)   (*((volatile unsigned short *)(port)))
 Get a 16-bit unsigned value from specified I/O port. More...
 
#define outp8(port, value)   *((volatile unsigned char *)(port)) = value
 Set a 8-bit unsigned value to specified I/O port. More...
 
#define inp8(port)   (*((volatile unsigned char *)(port)))
 Get a 8-bit unsigned value from specified I/O port. More...
 
#define NULL   (0)
 NULL pointer. More...
 
#define TRUE   (1)
 Boolean true, define to use in API parameters or return value. More...
 
#define FALSE   (0)
 Boolean false, define to use in API parameters or return value. More...
 
#define ENABLE   (1)
 Enable, define to use in API parameters. More...
 
#define DISABLE   (0)
 Disable, define to use in API parameters. More...
 
#define BIT0   (0x00000001)
 Bit 0 mask of an 32 bit integer. More...
 
#define BIT1   (0x00000002)
 Bit 1 mask of an 32 bit integer. More...
 
#define BIT2   (0x00000004)
 Bit 2 mask of an 32 bit integer. More...
 
#define BIT3   (0x00000008)
 Bit 3 mask of an 32 bit integer. More...
 
#define BIT4   (0x00000010)
 Bit 4 mask of an 32 bit integer. More...
 
#define BIT5   (0x00000020)
 Bit 5 mask of an 32 bit integer. More...
 
#define BIT6   (0x00000040)
 Bit 6 mask of an 32 bit integer. More...
 
#define BIT7   (0x00000080)
 Bit 7 mask of an 32 bit integer. More...
 
#define BIT8   (0x00000100)
 Bit 8 mask of an 32 bit integer. More...
 
#define BIT9   (0x00000200)
 Bit 9 mask of an 32 bit integer. More...
 
#define BIT10   (0x00000400)
 Bit 10 mask of an 32 bit integer. More...
 
#define BIT11   (0x00000800)
 Bit 11 mask of an 32 bit integer. More...
 
#define BIT12   (0x00001000)
 Bit 12 mask of an 32 bit integer. More...
 
#define BIT13   (0x00002000)
 Bit 13 mask of an 32 bit integer. More...
 
#define BIT14   (0x00004000)
 Bit 14 mask of an 32 bit integer. More...
 
#define BIT15   (0x00008000)
 Bit 15 mask of an 32 bit integer. More...
 
#define BIT16   (0x00010000)
 Bit 16 mask of an 32 bit integer. More...
 
#define BIT17   (0x00020000)
 Bit 17 mask of an 32 bit integer. More...
 
#define BIT18   (0x00040000)
 Bit 18 mask of an 32 bit integer. More...
 
#define BIT19   (0x00080000)
 Bit 19 mask of an 32 bit integer. More...
 
#define BIT20   (0x00100000)
 Bit 20 mask of an 32 bit integer. More...
 
#define BIT21   (0x00200000)
 Bit 21 mask of an 32 bit integer. More...
 
#define BIT22   (0x00400000)
 Bit 22 mask of an 32 bit integer. More...
 
#define BIT23   (0x00800000)
 Bit 23 mask of an 32 bit integer. More...
 
#define BIT24   (0x01000000)
 Bit 24 mask of an 32 bit integer. More...
 
#define BIT25   (0x02000000)
 Bit 25 mask of an 32 bit integer. More...
 
#define BIT26   (0x04000000)
 Bit 26 mask of an 32 bit integer. More...
 
#define BIT27   (0x08000000)
 Bit 27 mask of an 32 bit integer. More...
 
#define BIT28   (0x10000000)
 Bit 28 mask of an 32 bit integer. More...
 
#define BIT29   (0x20000000)
 Bit 29 mask of an 32 bit integer. More...
 
#define BIT30   (0x40000000)
 Bit 30 mask of an 32 bit integer. More...
 
#define BIT31   (0x80000000)
 Bit 31 mask of an 32 bit integer. More...
 
#define BYTE0_Msk   (0x000000FF)
 Mask to get bit0~bit7 from a 32 bit integer. More...
 
#define BYTE1_Msk   (0x0000FF00)
 Mask to get bit8~bit15 from a 32 bit integer. More...
 
#define BYTE2_Msk   (0x00FF0000)
 Mask to get bit16~bit23 from a 32 bit integer. More...
 
#define BYTE3_Msk   (0xFF000000)
 Mask to get bit24~bit31 from a 32 bit integer. More...
 
#define GET_BYTE0(u32Param)   ((u32Param & BYTE0_Msk) )
 
#define GET_BYTE1(u32Param)   ((u32Param & BYTE1_Msk) >> 8)
 
#define GET_BYTE2(u32Param)   ((u32Param & BYTE2_Msk) >> 16)
 
#define GET_BYTE3(u32Param)   ((u32Param & BYTE3_Msk) >> 24)
 

Typedefs

typedef enum IRQn IRQn_Type
 
typedef volatile unsigned char vu8
 Define 8-bit unsigned volatile data type. More...
 
typedef volatile unsigned short vu16
 Define 16-bit unsigned volatile data type. More...
 
typedef volatile unsigned long vu32
 Define 32-bit unsigned volatile data type. More...
 

Enumerations

enum  IRQn {
  NonMaskableInt_IRQn = -14 ,
  HardFault_IRQn = -13 ,
  SVCall_IRQn = -5 ,
  PendSV_IRQn = -2 ,
  SysTick_IRQn = -1 ,
  BOD_IRQn = 0 ,
  WDT_IRQn = 1 ,
  EINT0_IRQn = 2 ,
  EINT1_IRQn = 3 ,
  GPIO01_IRQn = 4 ,
  GPIO234_IRQn = 5 ,
  PWM_IRQn = 6 ,
  FB_IRQn = 7 ,
  TMR0_IRQn = 8 ,
  TMR1_IRQn = 9 ,
  UART_IRQn = 12 ,
  SPI_IRQn = 14 ,
  GPIO5_IRQn = 16 ,
  HIRC_IRQn = 17 ,
  I2C_IRQn = 18 ,
  ACMP_IRQn = 25 ,
  PDWU_IRQn = 28 ,
  ADC_IRQn = 29
}
 

Detailed Description

NUC029FAE peripheral access layer header file. This file contains all the peripheral register's definitions, bits definitions and memory mapping for NuMicro NUC029FAE MCU.

Version
V1.00
Revision
6
Date
14/11/28 6:34p
Note
SPDX-License-Identifier: Apache-2.0 Copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.

Definition in file NUC029FAE.h.