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NUC029FAE_BSP V3.01.004
The Board Support Package for NUC029FAE MCU
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Modules | |
NUC029FAE Control Register | |
Macros | |
#define | __CM0_REV 0x0201 |
#define | __NVIC_PRIO_BITS 2 |
#define | __Vendor_SysTickConfig 0 |
#define | __MPU_PRESENT 0 |
#define | __FPU_PRESENT 0 |
Typedefs | |
typedef enum IRQn | IRQn_Type |
Enumerations | |
enum | IRQn { NonMaskableInt_IRQn = -14 , HardFault_IRQn = -13 , SVCall_IRQn = -5 , PendSV_IRQn = -2 , SysTick_IRQn = -1 , BOD_IRQn = 0 , WDT_IRQn = 1 , EINT0_IRQn = 2 , EINT1_IRQn = 3 , GPIO01_IRQn = 4 , GPIO234_IRQn = 5 , PWM_IRQn = 6 , FB_IRQn = 7 , TMR0_IRQn = 8 , TMR1_IRQn = 9 , UART_IRQn = 12 , SPI_IRQn = 14 , GPIO5_IRQn = 16 , HIRC_IRQn = 17 , I2C_IRQn = 18 , ACMP_IRQn = 25 , PDWU_IRQn = 28 , ADC_IRQn = 29 } |
Configuration of the Cortex-M0 Processor and Core Peripherals
#define __CM0_REV 0x0201 |
Core Revision r2p1
Definition at line 115 of file NUC029FAE.h.
#define __FPU_PRESENT 0 |
FPU present or not
Definition at line 119 of file NUC029FAE.h.
#define __MPU_PRESENT 0 |
MPU present or not
Definition at line 118 of file NUC029FAE.h.
#define __NVIC_PRIO_BITS 2 |
Number of Bits used for Priority Levels
Definition at line 116 of file NUC029FAE.h.
#define __Vendor_SysTickConfig 0 |
Set to 1 if different SysTick Config is used
Definition at line 117 of file NUC029FAE.h.
Interrupt Number Definition. The maximum of 32 Specific Interrupts are possible.
enum IRQn |
Interrupt Number Definition. The maximum of 32 Specific Interrupts are possible.
Definition at line 73 of file NUC029FAE.h.