NANO100_BSP V3.04.002
The Board Support Package for Nano100BN Series
crc.h
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1/**************************************************************************/
12#ifndef __CRC_H__
13#define __CRC_H__
14
15#ifdef __cplusplus
16extern "C"
17{
18#endif
19
20
33/*---------------------------------------------------------------------------------------------------------*/
34/* CRC Polynomial Mode Constant Definitions */
35/*---------------------------------------------------------------------------------------------------------*/
36#define CRC_CCITT 0x00000000UL
37#define CRC_8 0x40000000UL
38#define CRC_16 0x80000000UL
39#define CRC_32 0xC0000000UL
41/*---------------------------------------------------------------------------------------------------------*/
42/* Checksum, Write data Constant Definitions */
43/*---------------------------------------------------------------------------------------------------------*/
44#define CRC_CHECKSUM_COM 0x08000000UL
45#define CRC_CHECKSUM_RVS 0x02000000UL
46#define CRC_WDATA_COM 0x04000000UL
47#define CRC_WDATA_RVS 0x01000000UL
49/*---------------------------------------------------------------------------------------------------------*/
50/* CPU Write Data Length Constant Definitions */
51/*---------------------------------------------------------------------------------------------------------*/
52#define CRC_CPU_WDATA_8 0x00000000UL
53#define CRC_CPU_WDATA_16 0x10000000UL
54#define CRC_CPU_WDATA_32 0x20000000UL /* end of group NANO100_CRC_EXPORTED_CONSTANTS */
58
72#define CRC_ENABLE_INT(u32Mask) (PDMACRC->DMAIER |= (u32Mask))
73
83#define CRC_DISABLE_INT(u32Mask) (PDMACRC->DMAIER &= ~(u32Mask))
84
94#define CRC_GET_INT_FLAG() ((uint32_t)(PDMACRC->DMAISR))
95
105#define CRC_CLR_INT_FLAG(u32Mask) (PDMACRC->DMAISR |= (u32Mask))
106
116#define CRC_SET_SEED(u32Seed) { PDMACRC->SEED = (u32Seed); PDMACRC->CTL |= DMA_CRC_CTL_CRC_RST_Msk; }
117
127#define CRC_GET_SEED() ((uint32_t)(PDMACRC->SEED))
128
138#define CRC_WRITE_DATA(u32Data) (PDMACRC->WDATA = (u32Data))
139
140
141/*********************************************************************/
142void CRC_Open(uint32_t u32Mode, uint32_t u32Attribute, uint32_t u32Seed, uint32_t u32DataLen);
143void CRC_StartDMATransfer(uint32_t u32SrcAddr, uint32_t u32ByteCount);
144uint32_t CRC_GetChecksum(void);
145
146 /* end of group NANO100_CRC_EXPORTED_FUNCTIONS */
148 /* end of group NANO100_CRC_Driver */
150 /* end of group NANO100_Device_Driver */
152
153#ifdef __cplusplus
154}
155#endif
156
157#endif //__CRC_H__
158
159/*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/
void CRC_Open(uint32_t u32Mode, uint32_t u32Attribute, uint32_t u32Seed, uint32_t u32DataLen)
CRC Open.
Definition: crc.c:41
uint32_t CRC_GetChecksum(void)
Get CRC Checksum.
Definition: crc.c:76
void CRC_StartDMATransfer(uint32_t u32SrcAddr, uint32_t u32ByteCount)
CRC Start DMA transfer.
Definition: crc.c:60