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NUC472_NUC442_BSP V3.03.005
The Board Support Package for NUC472/NUC442
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NUC472/NUC442 EADC driver header file. More...
Go to the source code of this file.
Macros | |
#define | EADC0_SAMPLE_MODULE0 |
#define | EADC0_SAMPLE_MODULE1 |
#define | EADC0_SAMPLE_MODULE2 |
#define | EADC0_SAMPLE_MODULE3 |
#define | EADC0_SAMPLE_MODULE4 |
#define | EADC0_SAMPLE_MODULE5 |
#define | EADC0_SAMPLE_MODULE6 |
#define | EADC0_SAMPLE_MODULE7 |
#define | EADC1_SAMPLE_MODULE0 |
#define | EADC1_SAMPLE_MODULE1 |
#define | EADC1_SAMPLE_MODULE2 |
#define | EADC1_SAMPLE_MODULE3 |
#define | EADC1_SAMPLE_MODULE4 |
#define | EADC1_SAMPLE_MODULE5 |
#define | EADC1_SAMPLE_MODULE6 |
#define | EADC1_SAMPLE_MODULE7 |
#define | CMP_EADC0_SAMPLE_MODULE0 |
#define | CMP_EADC0_SAMPLE_MODULE1 |
#define | CMP_EADC0_SAMPLE_MODULE2 |
#define | CMP_EADC0_SAMPLE_MODULE3 |
#define | CMP_EADC1_SAMPLE_MODULE0 |
#define | CMP_EADC1_SAMPLE_MODULE1 |
#define | CMP_EADC1_SAMPLE_MODULE2 |
#define | CMP_EADC1_SAMPLE_MODULE3 |
#define | EADC_SCTL_CHSEL(x) |
#define | EADC_SCTL_TRGDLYDIV(x) |
#define | EADC_SCTL_TRGDLYCNT(x) |
#define | EADC_SOFTWARE_TRIGGER |
#define | EADC_STADC_TRIGGER |
#define | EADC_ADINT0_TRIGGER |
#define | EADC_ADINT1_TRIGGER |
#define | EADC_TIMER0_TRIGGER |
#define | EADC_TIMER1_TRIGGER |
#define | EADC_TIMER2_TRIGGER |
#define | EADC_TIMER3_TRIGGER |
#define | EADC_EPWM0CH0_TRIGGER |
#define | EADC_EPWM0CH2_TRIGGER |
#define | EADC_EPWM0CH4_TRIGGER |
#define | EADC_EPWM1CH0_TRIGGER |
#define | EADC_EPWM1CH2_TRIGGER |
#define | EADC_EPWM1CH4_TRIGGER |
#define | EADC_PWM0CH0_TRIGGER |
#define | EADC_PWM0CH1_TRIGGER |
#define | EADC_SPCTL_TRGDLYDIV_DIVIDER_1 |
#define | EADC_SPCTL_TRGDLYDIV_DIVIDER_2 |
#define | EADC_SPCTL_TRGDLYDIV_DIVIDER_4 |
#define | EADC_SPCTL_TRGDLYDIV_DIVIDER_16 |
#define | EADC_CMP_CMPCOND_LESS_THAN |
#define | EADC_CMP_CMPCOND_GREATER_OR_EQUAL |
#define | EADC_CMP_ADCMPIE_ENABLE |
#define | EADC_CMP_ADCMPIE_DISABLE |
#define | EADC0_TRIGGEREN0 |
#define | EADC0_TRIGGEREN1 |
#define | EADC0_TRIGGEREN2 |
#define | EADC0_TRIGGEREN3 |
#define | EADC1_TRIGGEREN0 |
#define | EADC1_TRIGGEREN1 |
#define | EADC1_TRIGGEREN2 |
#define | EADC1_TRIGGEREN3 |
#define | EADC0_CH0 |
#define | EADC0_CH1 |
#define | EADC0_CH2 |
#define | EADC0_CH3 |
#define | EADC0_CH4 |
#define | EADC0_CH5 |
#define | EADC0_CH6 |
#define | EADC0_CH7 |
#define | EADC0_VBG |
#define | EADC0_VTEMP |
#define | EADC0_AVSS |
#define | EADC0_OP0 |
#define | EADC1_CH0 |
#define | EADC1_CH1 |
#define | EADC1_CH2 |
#define | EADC1_CH3 |
#define | EADC1_CH4 |
#define | EADC1_CH5 |
#define | EADC1_CH6 |
#define | EADC1_CH7 |
#define | EADC1_OP1 |
#define | EADC_POWER_DOWN(eadc) |
Power down EADC module. More... | |
#define | EADC_POWER_ON(eadc) |
Power on EADC module. More... | |
#define | EADC_CONV_RESET(eadc) |
A/D Converter Control Circuits Reset. More... | |
#define | EADC_ENABLE_DOUBLE_BUFFER(eadc, u32ModuleNum) |
Enable double buffer mode. More... | |
#define | EADC_DISABLE_DOUBLE_BUFFER(eadc, u32ModuleNum) |
Disable double buffer mode. More... | |
#define | EADC_ENABLE_INT(eadc, u32Mask) |
Enable the interrupt. More... | |
#define | EADC_DISABLE_INT(eadc, u32Mask) |
Disable the interrupt. More... | |
#define | EADC_ENABLE_SAMPLE_MODULE_INT(eadc, u32IntSel, u32ModuleMask) |
Enable the sample module interrupt. More... | |
#define | EADC_DISABLE_SAMPLE_MODULE_INT(eadc, u32IntSel, u32ModuleMask) |
Disable the sample module interrupt. More... | |
#define | EADC_START_CONV(eadc, u32ModuleMask) |
Start the A/D conversion. More... | |
#define | EADC_GET_PENDING_CONV(eadc) |
Get the conversion pending flag. More... | |
#define | EADC_GET_CONV_DATA(eadc, u32ModuleNum) |
Get the conversion data of the user-specified sample module. More... | |
#define | EADC_GET_DATA_OVERRUN_FLAG(eadc, u32ModuleMask) |
Get the data overrun flag of the user-specified sample module. More... | |
#define | EADC_GET_DATA_VALID_FLAG(eadc, u32ModuleMask) |
Get the data valid flag of the user-specified sample module. More... | |
#define | EADC_GET_DOUBLE_DATA(eadc, u32ModuleNum) |
Get the double data of the user-specified sample module. More... | |
#define | EADC_GET_INT_FLAG(eadc, u32Mask) |
Get the user-specified interrupt flags. More... | |
#define | EADC_GET_SAMPLE_MODULE_OV_FLAG(eadc, u32ModuleMask) |
Get the user-specified sample module overrun flags. More... | |
#define | EADC_CLR_INT_FLAG(eadc, u32Mask) |
Clear the selected interrupt status bits. More... | |
#define | EADC_IS_DATA_OV(eadc) |
Check all sample module A/D result data register overrun flags. More... | |
#define | EADC_IS_DATA_VALID(eadc) |
Check all sample module A/D result data register valid flags. More... | |
#define | EADC_IS_SAMPLE_MODULE_OV(eadc) |
Check all A/D sample module start of conversion overrun flags. More... | |
#define | EADC_IS_INT_FLAG_OV(eadc) |
Check all A/D interrupt flag overrun bits. More... | |
#define | EADC_IS_BUSY(eadc, converter) |
Get the busy state of EADC. More... | |
#define | EADC_ENABLE_CMP0(eadc, u32ModuleNum, u32Condition, u16CMPData, u32MatchCount) |
Configure the comparator 0 and enable it. More... | |
#define | EADC_ENABLE_CMP1(eadc, u32ModuleNum, u32Condition, u16CMPData, u32MatchCount) |
Configure the comparator 1 and enable it. More... | |
#define | EADC_ENABLE_CMP_INT(eadc, u32CMP) |
Enable the compare interrupt. More... | |
#define | EADC_DISABLE_CMP_INT(eadc, u32CMP) |
Disable the compare interrupt. More... | |
#define | EADC_DISABLE_CMP0(eadc) |
Disable comparator 0. More... | |
#define | EADC_DISABLE_CMP1(eadc) |
Disable comparator 1. More... | |
#define | EADC_ENABLE_SIMULTANEOUS(eadc, u32ModuleMask) |
Enable simultaneous mode. More... | |
#define | EADC_DISABLE_SIMULTANEOUS(eadc, u32ModuleMask) |
Disable simultaneous mode. More... | |
#define | EADC_EnablePWMTriggerCondition(eadc, u32ADTriggerModuleNum, u32TriggerMask) (*(__IO uint32_t *)(&(eadc)->AD0TRGEN0 + (u32ADTriggerModuleNum)) |= (u32TriggerMask)) |
Enable PWM and EPWM trigger trigger EADC condition. More... | |
#define | EADC_DisablePWMTriggerCondition(eadc, u32ADTriggerModuleNum, u32TriggerMask) (*(__IO uint32_t *)(&(eadc)->AD0TRGEN0 + (u32ADTriggerModuleNum)) |= (u32TriggerMask)) |
Disable PWM and EPWM trigger trigger EADC condition. More... | |
Functions | |
void | EADC_Open (EADC_T *eadc, uint32_t u32InputMode) |
This function make EADC_module be ready to convert. More... | |
void | EADC_Close (EADC_T *eadc) |
Disable EADC_module. More... | |
void | EADC_ConfigSampleModule (EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerSrc, uint32_t u32Channel) |
Configure the sample control logic module. More... | |
void | EADC_SetTriggerDelayTime (EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerDelayTime, uint32_t u32DelayClockDivider) |
Set trigger delay time. More... | |
void | EADC_SetExtendSampleTime (EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32ExtendSampleTime) |
Set EADC extend sample time. More... | |
NUC472/NUC442 EADC driver header file.
Definition in file eadc.h.